This invention relates generally to the fabrication of semiconductor devices, and more particularly to a process for fabricating semiconductor devices which uses selective deposition of a masking layer to reduce the number of process steps.
The successful fabrication of semiconductor devices requires the sequential application of a large number of process steps. These many process steps are all carefully interrelated to accomplish the finished product and often require the structure resulting from one process step to be in alignment with the structure resulting from another process step. Reducing the total number of process steps results in a reduction of the cost of the process and may also increase the fabrication yield of that process. This is especially true of the reduction in photolithography steps and still more especially of those photolithography steps which are required to align one structure to another. For example, it is advantageous and cost effective to provide process steps which self align one structure to another, such as one ion implanted region to another ion implanted region.
Accordingly, there is a continuing need in the semiconductor industry for fabrication processes which reduce the number of required processing steps and which provide for self alignment between structures produced.
It is therefore an object of this invention to provide an improved process for fabricating semiconductor devices which reduces the number of process steps.
It is another object of this invention to provide an improved process for fabricating semiconductor devices with a reduced number of photolithography process steps.
It is yet another object of this invention to provide an improved process for fabricating semiconductor devices including the alignment of ion implanted regions.
It is still another object of this invention to provide an improved process for fabricating LDD CMOS devices.
It is a further object of this invention to provide an improved process for aligning device regions in a semiconductor structure while utilizing a reduced number of processing steps.